ASIC and FPGA Verification - Telecom

Job Description

At Capgemini Engineering, you are part of something bigger. Our close cooperation with other entities within the Capgemini Group will give you the opportunity to explore endless possibilities. We have offices all over the world, and the Capgemini family consists of more than 340 000 colleagues globally.

Not all heroes wear a cape – our employees help to make the world a better place. We do this by working in projects that save lives. Our consultants develop next generation 5G, ensure the quality of software apps for medical devices, develop and test driver assistance functions in cars and so much more. Our clients are big international companies, as well as local public organizations and Nordic startups. Join us and get the future you want!

In Telecommunications we are generating new revenue streams in a connected world​. Our experts are involved in Virtual Network Foundation with transformation to Hyper-Scaler – Virtualized Networks and cloud. We are also experts in network and compute product and service development. 5G is the fifth generation of cellular networks and is here right now, so we are working with 5G Market Adoption where we develop software frameworks solutions, communications system integration, and intelligent 5G & edge.

Working for Capgemini Engineering is more than just a job. We have several activities during the year where we meet to share knowledge or just to have fun.

Your role

• Define test plan, verification strategy and specifications for IP/Subsystem/SOC Design’s.
• Implement testbench infrastructure and create testcases and sequences in UVM-SV(System-Verilog).
• Implement and work on to close Functional verification using coverage driven methodology.
• Make testbench architecture decisions based on Design features.

Your profile

• Hands on experience in creating Test bench environment from functional requirements using UVM.
• Solid understanding and experience in System Verilog and UVM methodology.
• Hands on experience in Test planning, Score boarding, Modeling coverage and coverage closure.
• Several years of real time experience in ASIC and FPGA Verification.
• Familiar with any of the Industry standard protocols (ARM-AMBA, Ethernet, PCIe, DDR, SATA, SERDES, CPRI, I2C etc).
• Should be a team player and also have the ability to work independently.

Nice to have:

• Experience in C, C++, System-C.
• Scripting in Perl/Tcl/Python.
• Experience in GIT and Gerrit flow.
• Knowledge in Formal Verification and Validation.
• Working on different levels of ASIC Verification is a plus (IP/Subsystem/SOC Design’s).
• Integrating 3rd party Verification IP’s.

Application and contact
For questions and for more information contact Johanna Holm, Talent Acquisition Partner [email protected]